Articles by subject: Author: Jonathan Blanchard

Picture of a Zynq-7000 SoC.

Zynq-7000 Bare-Metal Benchmarks

In this article we’ll look at some well-known CPU benchmarks, namely CoreMARK, Dhrystone, Whetstone and Linpack. Following that, we’ll look at the memory bandwidth and latency of the external DDR memory, On-Chip RAM and block RAM (BRAM) in the FPGA. Finally, we’ll round up with numbers on interrupt latency.

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QSPI NOR Flash Part 3 — The Quad SPI Protocol

Over the course of this article, we’ll go through the variations of the protocol used by QSPI NOR Flash devices. We’ll start simple, with the basic SPI protocol then move through the variations to reach some of the more complicated QIO, QPI and DDR variations.

Read More »
A portion of a Makefile with the IAR Embedded Workbench splash screen in the foreground.

IAR Embedded Workbench & Makefiles

How to write a Makefile for the IAR Embedded Workbench toolchain on Windows. With examples for building an application or a static library with all the basic make rules to compile, assemble and link a project.

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Screenshot of the Eclipse IDE new project dialog with the IAR Embedded Workbench splash screen in the foreground.

IAR Eclipse Setup Guide Part 2 — Managed Build Project

This is part 2 of a series of step-by-step guide on setting up and using the IAR Embedded Workbench within the Eclipse IDE. Using the tools installed in part 1 this article will guide the reader on how to create a C/C++ managed build project within Eclipse using the IAR Eclipse Plugin.

Read More »
Screenshot of the IAR splash screen with the Eclipse IDE in the background.

IAR Eclipse Setup Guide Part 1 — Tools Setup

In this new series of guides, we’ll look at how to setup and use the IAR Eclipse plugin. The current article will focus on tools installations and configurations. Future articles will go over managed build and Makefile projects as well as debugging.

Read More »

Articles by subject: Author: Jonathan Blanchard

Picture of a Zynq-7000 SoC.

Zynq-7000 Bare-Metal Benchmarks

In this article we’ll look at some well-known CPU benchmarks, namely CoreMARK, Dhrystone, Whetstone and Linpack. Following that, we’ll look at the memory bandwidth and latency of the external DDR memory, On-Chip RAM and block RAM (BRAM) in the FPGA. Finally, we’ll round up with numbers on interrupt latency.

Read More »

QSPI NOR Flash Part 3 — The Quad SPI Protocol

Over the course of this article, we’ll go through the variations of the protocol used by QSPI NOR Flash devices. We’ll start simple, with the basic SPI protocol then move through the variations to reach some of the more complicated QIO, QPI and DDR variations.

Read More »
A portion of a Makefile with the IAR Embedded Workbench splash screen in the foreground.

IAR Embedded Workbench & Makefiles

How to write a Makefile for the IAR Embedded Workbench toolchain on Windows. With examples for building an application or a static library with all the basic make rules to compile, assemble and link a project.

Read More »
Screenshot of the Eclipse IDE new project dialog with the IAR Embedded Workbench splash screen in the foreground.

IAR Eclipse Setup Guide Part 2 — Managed Build Project

This is part 2 of a series of step-by-step guide on setting up and using the IAR Embedded Workbench within the Eclipse IDE. Using the tools installed in part 1 this article will guide the reader on how to create a C/C++ managed build project within Eclipse using the IAR Eclipse Plugin.

Read More »
Screenshot of the IAR splash screen with the Eclipse IDE in the background.

IAR Eclipse Setup Guide Part 1 — Tools Setup

In this new series of guides, we’ll look at how to setup and use the IAR Eclipse plugin. The current article will focus on tools installations and configurations. Future articles will go over managed build and Makefile projects as well as debugging.

Read More »