Embedded Software Insight
JBLopen specializes in embedded RTOS and bare-metal applications requiring high-end processors and SoCs as well as deeply embedded MCUs with aggressive resource and power constraints. Our research and development team provides the embedded market with cutting-edge software products. Meanwhile our consulting team can help you get your next project to market faster with improved features and performance using the latest embedded technologies.
TREEspan File System™ is a low footprint transactional file system for deeply embedded RTOS and bare-metal applications.
The BASEplatform™ is a portable platform support solution offering a complete set of drivers, BSP and RTOS integration for any MCU.
Embedded software development services, RTOS drivers & BSP, porting and integration. Firmware migration and custom SDK.
For this article, we look at Everspin’s EM064LX in the context of data storage applications, focusing on access speed metrics, that is average throughput and worst-case access latency. For context, we compare MRAM performances with NOR and NAND flash using a simple benchmark and discuss the implications of the obtained results from an application design standpoint.
In this article, we take a closer look at this promising new offering, focusing on differentiating factors compared to existing flash-based devices and previous MRAM implementations. We present 4 use case scenarios to illustrate how we believe the EMxxLX xSPI family can compete with current flash-based solutions and how it really changes the game for us embedded designers.
This article is all about emerging non-volatile (NVM) technologies, a complex and ever-evolving topic that has stimulated numerous research fields over the years, and engaged substantial investments from the biggest players in the semiconductor industry. The topic is also quickly gaining momentum among embedded developers.
In this article we’ll look at some well-known CPU benchmarks, namely CoreMARK, Dhrystone, Whetstone and Linpack. Following that, we’ll look at the memory bandwidth and latency of the external DDR memory, On-Chip RAM and block RAM (BRAM) in the FPGA. Finally, we’ll round up with numbers on interrupt latency.
In this article, we present a detailed discussion of SD card performances along with benchmarks for consumer and industrial-grade cards. The results help quantify the large variations in performance between individual devices and their impact on real-world performance.
Over the course of this article, we’ll go through the variations of the protocol used by QSPI NOR Flash devices. We’ll start simple, with the basic SPI protocol then move through the variations to reach some of the more complicated QIO, QPI and DDR variations.
In this guide we go over creating a debug configuration for the IAR C-SPY debugger using the IAR Eclipse plugin. This guide is the fourth and last of a series on setting up and using the IAR Embedded Workbench tools within the Eclipse IDE.
In this guide we’ll look at how to setup a Makefile project using the IAR Eclipse Plugin. When using a Makefile project in Eclipse CDT the user is responsible for providing a suitable Makefile to build the application or library.