Jonathan Blanchard

MicroBlaze Configuration for an RTOS Part 2 – Configuration Parameters

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Close up of the MicroBlaze IP block within the Xilinx Vivado IP Integrator.

This article aims at helping developers and designers who must configure a MicroBlaze system. Especially early on in the development process where the final firmware is not available for benchmarking and tweaking. At these early steps it is often necessary to select a good approximation of the final configuration to have a good idea of the resource usage of the MicroBlaze.

Introduction to On-Chip RAM

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Block diagrams of three types of on-chip RAM (OCRAM) topology.

On chip ram or internal RAM, often abbreviated OCRAM or OCM has been around since the earliest System on Chips(SoCs). This articles goes over general purpose On-Chip RAM as well as more specialized forms such as Tightly Coupled Memory (TCM) and DMA buffers. We discuss major features and design considerations that could impact an embedded … Read more

BASEplatform Support for Express Logic’s X-WARE IoT PLATFORM

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BASEplatform logo.

We announced a few weeks ago support for the Express Logic ThreadX RTOS as well as the X-WARE IoT PLATFORM™ within our very own BASEplatform™. This article goes over some of the advantages of using JBLopen’s BASEplatform Board Support Packages (BSPs) and drivers along with Express Logic’s solution. What Is the BASEplatform The BASEplatform is … Read more

BASEplatform Bring-Up on the Toradex Colibri iMX7

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Close-up view of Toradex Colibri iMX7 in evaluation board.

This article will go over some aspects of the early bring-up experience using the BASEplatform™ on the Toradex Colibri iMX7 System on Module (SoM). It will also cover features and advantages of the Colibri SoM for embedded developers interested in using an RTOS or a bare-metal environment on the NXP i.MX7 SoC. The BASEplatform is … Read more

Estimating Worst Case Interrupt Latency at Runtime

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Histogram of interrupt latency distribution with pase fail sections for demonstration.

This article shows a simple way of estimating worst case interrupt latency at runtime which can be implemented on most MCUs and RTOSes or even bare-metal. All that is needed is a hardware timer that can generate an interrupt after an arbitrary time delay. The technique is also rather non-intrusive, making it usable all the way to production without significantly affecting the application’s performance.

BASEplatform in Depth: The I/O API

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BASEplatform logo.

In the last article about our recently launched BASEplatform product, we gave an overview of the various modules that can be part of the BASEplatform. In this article we go in a little more detail about an important aspect of any embedded software product, the API. In this case, the I/O API since it’s one … Read more

BASEplatform in Depth: The Modules

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Diagram of the core modules of the BASEplatform cross platform SDK.

Two weeks ago, we launched our first embedded software product, BASEplatform. This article is the first of a series where we go into more details about the features and advantages of the BASEplatform. BASEplatform is designed to bring application developers all the necessary low-level components such as startup code, drivers, BSP, RTOS integration as well … Read more

Introducing BASEplatform

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JBLopen BASEplatform introduction logo.

We are proud to announce that we are jumping in the embedded software component market with the introduction of BASEplatform™. Tackling the fundamentals, BASEplatform is a collection of low-level interface modules, drivers, and board support packages. Designed from the ground up to provide the foundation of a successful embedded software design. Whether for a bare-metal project … Read more

Zynq-7000 Connectivity Using the uC/OS BSP

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Close up view of the Digilent Zybo development board showing the Xilinx Zynq-7000 SoC.

In two previous articles, I have looked at using Micrium’s uC/OS RTOS on the Xilinx Zynq-7000. I only covered kernel and storage. This time, I will be exploring some connectivity options in combination with the Digilent Zybo. Namely, using Micrium’s USB device solution and HTTP server through the Zybo’s Ethernet port. This is also a perfect opportunity to try the new and improved release of Vivado 2017.1.

The plan is to use the Zybo on-board SD Card to hold the html files for the HTTP server. To make it more interesting, instead of just copying the files using a PC, I’ll turn the Zybo into a USB mass storage device to access the SD Card.

Digilent ZYBO development board with the Xilinx Zynq-7000 system on chip and FPGA.
Figure 1 – Digilent ZYBO

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