Blog

Embedded Software Articles

Close up view of a MicroBlaze system within the Xilinx Vivado IP Integrator.

MicroBlaze Configuration for an RTOS Part 3 – Cache Configuration

Jonathan Blanchard May 23, 2019

This article will look into details the cache configuration for the MicroBlaze that was skipped in part 2. Configuring the cache correctly is critical to the overall performance of a MicroBlaze system and can also take a considerable amount of FPGA resource, especially block RAM. When configuring the cache, the goal is to use the minimum cache size required to meet the application’s performance but no larger.

Close up of the MicroBlaze IP block within the Xilinx Vivado IP Integrator.

MicroBlaze Configuration for an RTOS Part 2 – Configuration Parameters

Jonathan Blanchard April 25, 2019

This article aims at helping developers and designers who must configure a MicroBlaze system. Especially early on in the development process where the final firmware is not available for benchmarking and tweaking. At these early steps it is often necessary to select a good approximation of the final configuration to have a good idea of the resource usage of the MicroBlaze.

Close up screenshot of a MicroBlase system in the Xilinx Vivado IP Integrator.

MicroBlaze Configuration for an RTOS Part 1 – Memory Hierarchy

Jonathan Blanchard February 7, 2019

This article introduces the various memory hierarchy available when designing a MicroBlaze system using the Xilinx Vivado IP Integrator.

Block diagrams of three types of on-chip RAM (OCRAM) topology.

Introduction to On-Chip RAM

Jonathan Blanchard January 24, 2019

On chip ram or internal RAM, often abbreviated OCRAM or OCM has been around since the earliest System on Chips(SoCs). This articles goes over general purpose On-Chip RAM as well as more specialized forms such as Tightly Coupled Memory (TCM) and DMA buffers. We discuss major features and design considerations that could impact an embedded

BASEplatform Support for Express Logic’s X-WARE IoT PLATFORM

Jonathan Blanchard December 5, 2018

We announced a few weeks ago support for the Express Logic ThreadX RTOS as well as the X-WARE IoT PLATFORM™ within our very own BASEplatform™. This article goes over some of the advantages of using JBLopen’s BASEplatform Board Support Packages (BSPs) and drivers along with Express Logic’s solution. What Is the BASEplatform The BASEplatform is

Close-up view of Toradex Colibri iMX7 in evaluation board.

BASEplatform Bring-Up on the Toradex Colibri iMX7

Jonathan Blanchard November 21, 2018

This article will go over some aspects of the early bring-up experience using the BASEplatform™ on the Toradex Colibri iMX7 System on Module (SoM). It will also cover features and advantages of the Colibri SoM for embedded developers interested in using an RTOS or a bare-metal environment on the NXP i.MX7 SoC. The BASEplatform is

Histogram of interrupt latency distribution with pase fail sections for demonstration.

Estimating Worst Case Interrupt Latency at Runtime

Jonathan Blanchard October 31, 2018

This article shows a simple way of estimating worst case interrupt latency at runtime which can be implemented on most MCUs and RTOSes or even bare-metal. All that is needed is a hardware timer that can generate an interrupt after an arbitrary time delay. The technique is also rather non-intrusive, making it usable all the way to production without significantly affecting the application’s performance.

BASEplatform in Depth: The I/O API

Jonathan Blanchard November 27, 2017

In the last article about our recently launched BASEplatform product, we gave an overview of the various modules that can be part of the BASEplatform. In this article we go in a little more detail about an important aspect of any embedded software product, the API. In this case, the I/O API since it’s one

Diagram of the core modules of the BASEplatform cross platform SDK.

BASEplatform in Depth: The Modules

Jonathan Blanchard November 8, 2017

Two weeks ago, we launched our first embedded software product, BASEplatform. This article is the first of a series where we go into more details about the features and advantages of the BASEplatform. BASEplatform is designed to bring application developers all the necessary low-level components such as startup code, drivers, BSP, RTOS integration as well

Introducing BASEplatform

Jonathan Blanchard October 23, 2017

We are proud to announce that we are jumping in the embedded software component market with the introduction of BASEplatform™. Tackling the fundamentals, BASEplatform is a collection of low-level interface modules, drivers, and board support packages. Designed from the ground up to provide the foundation of a successful embedded software design. Whether for a bare-metal project

Close up view of the Digilent Zybo development board showing the Xilinx Zynq-7000 SoC.

Zynq-7000 Connectivity Using the uC/OS BSP

Jonathan Blanchard May 22, 2017

In two previous articles, I have looked at using Micrium’s uC/OS RTOS on the Xilinx Zynq-7000. I only covered kernel and storage. This time, I will be exploring some connectivity options in combination with the Digilent Zybo. Namely, using Micrium’s USB device solution and HTTP server through the Zybo’s Ethernet port. This is also a

Close up shot of the NXP i.MX7 Sabre development board showing the SoC BGA chip.

i.MX7D M4 Bare-Metal Bring-up and Benchmark

Jonathan Blanchard May 7, 2017

Following up on the last piece about the NXP i.MX 7, this article looks at the ARM Cortex-M4 companion of the Cortex-A7 present in the i.MX 7. Or to put it another way, a Kinetis-on-chip since it’s very similar to a high-end Cortex-M4 based Kinetis. This article summarizes my experience writing a brand new bare