Embedded Software Insight
In this article we’ll leave the package attributes behind to focus on the internal features of QSPI devices, starting with the memory organization. This article will cover the overall capacity, multi-stack devices as well as the memory map organization units such as pages, blocks and sectors.
In this first article, we’ll go over some important considerations to keep in mind when using a NOR for code shadowing or execute in place, and explain how these considerations may change when using the NOR for data storage with a file system. Then we’ll take a quick look at the hardware characteristics of QSPI NOR devices.
In this article we’ll look at the last step of setting up a C/C++ embedded development project within Eclipse CDT. Which is creating and launching a debug configuration for the project. The kind of project managed or Makefile base does not affect the debugging process so these instructions applies to both types of projects.
Last week was one of pride and excitement for the JBLopen’s development team as we released our latest product, the TREEspan File System (TSFS). After the official announcement and presentation, we feel the need to introduce the newcomer in a more personal way, such as we see it from the inside. Above all, we would … Read more
Following the last article on core performance this article looks at the MicroBlaze memory bandwidth and access latency. Within the article benchmarks results are presented and discussed for various configuration of the MicroBlaze memory sub system such as local memory, AXI blobk RAM and external SDRAM memory.
In this third part of the series on setting up a bare-metal GCC toolchain in Eclipse we look at Makefile projects. A Makefile project, is more complicated to setup but offers greater control and flexibility over the build process. A Makefile based project is also independent of Eclipse and can be built and maintained easily outside of Eclipse which can be useful for automated builds.
Following the success of the MicroBlaze configuration guide this article looks at core performance benchmarks of the Xilinx MicroBlaze using the EEMBC CoreMark benchmark. Like the previous article series, this article looks at various memory hierarchy configurations including local and external DDR memory and their impact on core performance.
This guide will go through the steps of creating a managed build project using Eclipse and the GCC toolchain setup in the previous guide. Along with basic instructions the guide includes information on how to setup the cross-gcc build as well as how to fix common build issues when using Eclipse and GCC.
In part 1 of this series is a complete step-by-step installation and configuration guide for all the tools required to integrate a GCC toolchain within the Eclipse IDE. Including obviously Eclipse and your selected GCC toolchain as well as the MSYS2 UNIX environment for Windows.
This article will look into details the cache configuration for the MicroBlaze that was skipped in part 2. Configuring the cache correctly is critical to the overall performance of a MicroBlaze system and can also take a considerable amount of FPGA resource, especially block RAM. When configuring the cache, the goal is to use the minimum cache size required to meet the application’s performance but no larger.