For this article, we look at Everspin’s EM064LX in the context of data storage applications, focusing on access speed metrics, that is average throughput and worst-case access latency. For context, we compare MRAM performances with NOR and NAND flash using a simple benchmark and discuss the implications of the obtained results from an application design standpoint.

In this article, we take a closer look at this promising new offering, focusing on differentiating factors compared to existing flash-based devices and previous MRAM implementations. We present 4 use case scenarios to illustrate how we believe the EMxxLX xSPI family can compete with current flash-based solutions and how it really changes the game for us embedded designers.

This article is all about emerging non-volatile (NVM) technologies, a complex and ever-evolving topic that has stimulated numerous research fields over the years, and engaged substantial investments from the biggest players in the semiconductor industry. The topic is also quickly gaining momentum among embedded developers.

Over the course of this article, we’ll go through the variations of the protocol used by QSPI NOR Flash devices. We’ll start simple, with the basic SPI protocol then move through the variations to reach some of the more complicated QIO, QPI and DDR variations.

In this article we’ll leave the package attributes behind to focus on the internal features of QSPI devices, starting with the memory organization. This article will cover the overall capacity, multi-stack devices as well as the memory map organization units such as pages, blocks and sectors.

In this first article, we’ll go over some important considerations to keep in mind when using a NOR for code shadowing or execute in place, and explain how these considerations may change when using the NOR for data storage with a file system. Then we’ll take a quick look at the hardware characteristics of QSPI NOR devices.