Finding Flash a Successor

This article is all about emerging non-volatile (NVM) technologies, a complex and ever-evolving topic that has stimulated numerous research fields over the years, and engaged substantial investments from the biggest players in the semiconductor industry. The topic is also quickly gaining momentum among embedded developers who are eager to find a faster, simpler and more robust alternative to flash memory.

While this burst of genuine enthusiasm helps fuel the quest for the memory of the future, marketing hype and overoptimistic claims of all sorts are somewhat muddying the waters for those, like us, who are trying to understand where all of this is going. In the last few years only, numerous new technologies have been claimed to be the flash killer. Some have put the bar even higher, aiming for nothing less than the universal memory, one that could make its way up into the memory hierarchy, eventually replacing DRAM and SRAM. This may well happen, but in the meantime, the flash domination continues and the future remains unsettled.

The ambition behind this article is to provide a down-to-earth portrait of the most promising and currently available NVM technologies, with an emphasis on discrete memory and data storage in embedded systems. The first part of the article is a quick overview of four fundamental NVM technologies: ferroelectric RAM (FRAM), magnetoresistive RAM, resistive RAM (ReRAM) and phase-change RAM (PCM). The second part of the article describes some of the foreseen benefits of these technologies from an embedded system design standpoint.

RAM-like NVM Technologies in Embedded Systems: The Current Picture

Before we dive in, let’s first clarify what we mean by RAM-like NVM. The expression refers to the behaviour of many emerging NVM technologies supporting byte-level random read and write accesses at bus speed, without pre-erasing (as is required for flash memory). All emerging NVM technologies are not necessarily RAM-like, but there is an obvious trend in that direction. All the NVM technologies that we discuss in this section are essentially RAM-like, although exceptions may occur depending on the exact implementation (e.g., minimum write access larger than a single byte).

Note that the expression RAM-like, in the context of this article, does not include battery-backed RAM technologies, commonly referred to as nvRAM. These technologies are certainly useful in some applications, but are not viable alternatives to flash in general. Consequently, this article does not discuss nvRAM technologies.

Phase-Change Memory (PCM or PRAM or PCRAM)

In phase-change memory, a glass alloy is switched between its amorphous and crystalline states using controlled heat. This state (or phase) modification comes with a change in electrical resistance which can be measured, providing a persistent way of storing information.

With early developments dating back to the 70s, PCM is not a new technology by any means. Samsung and Numonyx (then acquired by Micron Technology) conjointly made the phase-change memory technology widely available to embedded developers around 2009 in the form of discrete Quad SPI PCM chips (P5Q). At the time, performances and densities were comparable to NOR flash with the added benefit of removing the erase step requirement needed for flash.

Eventually, Micron discontinued the P5Q series of phase-change memory. But in 2015, Intel and Micron Technology introduced 3D XPoint (a technology initially presented as a type of phase-change memory but now considered as a subset of resistive memory) as the underlying technology for Intel’s Optane series of storage devices. However, Micron never commercialized the technology and has recently announced that it would cease its manufacturing, a surprising decision that raises questions about the future of the technology.

Back to embedded systems, ST Microelectronics materialized in 2019 prior investments in its embedded PCM (ePCM) technology, introducing the Stellar lineup of automotive MCUs based on Cortex-R52 cores with embedded PCM (ePCM) as a replacement for flash. The ePCM technology is said to be AEC-Q100 grade 0 compliant, which allows for operating temperatures up to 165^{\circ}C. To this day, however, the company has not committed to large-scale production.

Resistive RAM (ReRAM or RRAM)

In the case of ReRAM, the resistance of a dielectric material characterized by some conductive defects (either induced or inherent) is manipulated through an electrical field to permanently store information. More generally, the term resistive memory is commonly used to refer to various similar technologies (including the CBRAM technology currently licensed by Dialog Semiconductor (Renesas)), each with its own set of materials, performance tradeoffs and challenges.

On paper, resistive memory offers many of the compelling characteristics that we have come to expect from a universal memory candidate: low energy, low switch time, high endurance and excellent scalability. In actuality, though, the technology never quite made it to the combined level of performance and density of other RAM-like technologies. Is a technological breakthrough still possible? Assuredly. For now, though, resistive memory seems to be lagging behind in the race to becoming the next flash.

That being said, there is a current (albeit somewhat niche) market for resistive RAM. Due to extremely low read currents and excellent scalability, ReRAM is a compelling alternative to NOR flash for low-power, small-size applications such as wearable. Indeed, Fujitsu has just released a 12Mbit ReRAM memory with a read current of 0.15 mA @5MHz inside a tiny WLCSP-11 package (only 2.067 mm x 2.877mm). Access speed, however, remains limited by the maximum 10 MHz SPI bus speed and the 5 ms write cycle.

Ferroelectric RAM (FRAM or FeRAM)

FRAM leverages the ferroelectric property of certain materials characterized by a persistent electrical polarization that can be modified through a controlled electric field. The modification of the polarization state comes with a corresponding change in the electrical resistance of the material, which can then be measured.

The FRAM technology was made widely available to embedded developers by Ramtron in the early 2000s in the form of discrete memory chips equipped with either serial or parallel interfaces. In 2011, Texas Instrument introduced FRAM for code storage in its popular MSP430 series of MCUs. In 2018 (after acquiring Ramtron in 2012), Cypress (now Infineon) introduced its Excelon lineup of FRAM chips focused on industrial and automotive applications. Fujitsu, another FRAM pioneer, also has a large catalogue of discrete FRAM memories (the MB85Rx series) including the recent addition of a QSPI 8Mbit variant.

FRAM is certainly a viable option for niche applications where write speed, low energy consumption and endurance are simultaneously required. One of the main issues with FRAM though, appears to be scaling as the ferroelectric property cannot be preserved for arbitrarily low dimensions. Indeed, manufacturers seem unable to shrink the FRAM cell (using a transistor/capacitor pair as the elementary cell) down below 130 nm, which definitely hinders a wider adoption of the technology as a replacement for flash.

That being said, ferroelectric polarization might still be leveraged within different cell architectures and using different ferroelectric materials to reach smaller dimensions. FeFET-based FRAM (with a single ferroelectric transistor cell architecture) promises to scale down to 28 nm and below while being easier to integrate into current CMOS processes. This technology is still in its early stage of development, however, and it is very likely that some other technology will supercede flash before FeFET-based memory reaches large-scale production, if it ever does.

Magnetoresitive RAM (MRAM)

Last but not least, MRAM is based on the property of the magnetic tunnel junction (MTJ), much like the ferroelectric material of the FRAM, the MTJ can be switched between a low and a high resistance state depending on the (magnetic) polarization of the cell. The persistent polarization state of the MTJ can be modified either by a magnetic field (which requires a fairly high current) or through a spin-polarized current (which can be much lower). The former technology is referred to as toggle MRAM, while the latter is called STT MRAM (for spin-transfer torque MRAM).

Looking at its current position within the emerging NVM market, MRAM might well be on a trajectory to replace NOR flash (and perhaps even SLC NAND flash). It has many of the FRAM benefits (high write speed, low energy, high endurance) without the associated scaling problems (current spin-transfer torque (STT) MRAM implementations exist on 28 nm process technology node and further downscaling is anticipated in the short term.

Everspin made the MRAM technology widely available to embedded developers back in 2016 with its Quad SPI toggle MRAM memory. Since then, their portfolio has constantly evolved and one the most recent addition, a 1Gbit 28 nm STT MRAM with a DDR interface @1333MT/s, is more evidence that the technology can indeed scale (both in speed and density) and provide a viable alternative to flash memory.

More recently, in 2020, Avalanche-Technology has unveiled an industrial-grade SPI STT MRAM series to compete both Cypress F-RAM and Everspin MRAM devices. A few months ago, they have announced a third generation of space-grade STT MRAM with capacities going up to 4 Gb.

In 2019, Renesas partnered with Avalanche-Technology to offer QSPI MRAM memories as part of their own catalogue. Renesas still appears to be pursuing further technological improvements to this day.

The Benefits of RAM-like NVM for Embedded Systems

Looking at currently available performance data, transitioning from flash to RAM-like technologies will translate into performance gains at all levels. Let’s try to see how that is, starting with the most obvious performance gains and digging our way down to more indirect benefits.

Access Speed

Of all the benefits expected from various emerging NVM technologies, access speed is the easiest to explain and understand. Programming a flash cell requires high voltages (say 20V) which, using low-voltage supply, can only be achieved using large charge pumps. This limits cell endurance (more on endurance later) as well as write speed.

Table 1 contains typical read and write throughput values for serial NOR and NAND flash along with specifications gathered from datasheets of currently available (Q)SPI RAM-like memories. The difference is quite staggering. The only exception is Fujitsu’s ReRAM. This should not be interpreted as an inherent limitation of the resistive RAM technology though. In this case, it is likely the result of a deliberate trade-off since Fujitsu’s ReRAM lineup targets niche applications where energy consumption is the crux.

Table 1 - Typical read and write throughputs for serial NOR and NAND flash compared to actual serial RAM-like memory implementations.
NOR (typical)20MiB/s300KiB/s
NAND (typical)20MiB/s5MiB/s
Infineon Excelon FRAM50MiB/s50MiB/s
Fujitsu FRAM (MB85Rx)50MiB/s50MiB/s
Everspin toggle MRAM (MRx)50MiB/s50MiB/s
Avalanche MRAM (industrial P-SRAM)50MiB/s50MiB/s
Fujitsu ReRAM (MB85Ax)1MiB/s50KiB/s

Another important benefit of RAM-like technologies in terms of access performance is the fact that read and write operations can be performed at bus speed. There is no extra programming or loading time: once the data has been transferred, the read or write access is done. As a result, the device does not need to be polled for completion, which greatly reduces driver complexity and further enhances overall performances.

Energy Consumption

A flash cell is made of a floating gate transistor quite similar to a traditional MOSFET but with an added, electrically isolated, floating gate. Information is stored in the form of excess charge trapped (or not) into the floating gate. Pushing charges out of the floating gate requires quite a lot of energy, much more anyway than that required to read the cell.

On the other hand, both MRAM and FRAM exhibit balanced read/write energy consumption (comparable to the required read energy for flash). While this may not make a huge difference for code storage, this represents a giant leap forward for low-power data storage applications. In the case of ReRAM and PCM, actual energy consumption data is harder to find, but still, the write energy consumption is expected to be lower than that of flash as well.


In the case of flash memory, read/write operations are performed on pages (typically 2 KiB to 16 KiB large). Before a page can be reprogrammed, the whole containing block (usually 64-page large) must be erased. RAM-like technologies, on the other hand, do not need to be erased (by definition). Instead, cells can both be set and reset through the write operation.

A direct consequence of the mandatory erasing phase is increased write time and energy. In particular, in the case of NOR flash, erasing a whole block takes hundreds of milliseconds and typically draws a few tens of mA. Block erasing on NAND flash is faster but still significantly affects overall write performances.

Also, before a block can be erased, valid pages must be moved to another block, otherwise valid data would be lost. The process, often referred to as garbage collection, adds up to the performance penalty already incurred by the erasing process itself. Worst, the garbage collection process tends to increase the maximum write access time at the file level, such that performance requirements can only be met using a large amount of buffering RAM.

For instance, the SD Card specification allows for write access times up to 250 ms. We have shown that such long access times do indeed occur, sometimes in long streaks of larger-than-average accesses. This means that, in order to approach the average write throughput of the card, the application must buffer incoming data (most likely in RAM) while the card is handling the current write.

Finally, the garbage collection process needs some space to operate. At the very least, it needs an empty block to relocate valid pages, but depending on the flash management implementation, more space is sometimes required which reduces the effective size of the memory.

As you can see, the flash erase requirement has important ramifications in terms of write performance. Free of this requirement, RAM-like technologies come with an inherent performance advantage that goes beyond raw access speed alone.


Write endurance refers to the number of write accesses that can be performed on a given memory cell before it wears out, that is, before it no longer can retain information for the specified amount of time. Endurance obviously varies between different memory technologies. It can also vary as the result of various performance tradeoffs being made to accommodate particular applications.

In any case, current data suggests that endurance will likely improve as we trend away from flash. Table 2 contains typical write endurance specifications for NOR, SLC NAND and MLC NAND flash along with numbers gathered from datasheets of currently available RAM-like memories. With the exception of Fujitsu’s ReRAM (which, again, was obviously not optimized for write-centric workloads), all technologies exhibit better write endurance than flash by several orders of magnitude. PCM is not represented here, but is expected to have very high endurance numbers as well.

Table 2 - Typical endurance numbers for NOR and NAND flash compared to actual RAM-like memory implementations.
MemoryWrite Cycles
NOR (typical)105
NAND SLC (typical)105
NAND MLC (typical)103
Infineon Excelon FRAM1014
Fujitsu FRAM (MB85Rx)1013
Everspin toggle MRAM (MRx)
Avalanche STT MRAM (industrial P-SRAM)1014
Fujitsu ReRAM (MB85Ax)105

Dealing with limited endurance is a huge part of flash management. At the file system level (or flash translation layer if any), wear-levelling algorithms are needed to make sure that write operations are evenly spread across all the blocks. This is crucial to prevent blocks from prematurely wearing out, eventually making the whole device unusable. Still, even with proper wear-levelling, some blocks will fail. To address this, the flash management software must keep a number of spare blocks, to be used for bad block replacement. This reduces the effective size of the flash and adds up to the overall complexity of the flash management software.

At a higher level, limited endurance must be dealt with from early design stages to validation and beyond, with diagnostic tools to monitor the device once in the field. This equally applies to bare flash and managed flash memories. SD cards and eMMCs also have limited lifespans which, as highlighted by Tesla’s recent recall of Model S and Model X vehicles, must be factored into the application design as well.

Given the very high endurance specifications of currently available RAM-like memories, it is likely that wear-levelling and lifecycle management will become things of the past as we migrate away from flash. To be fair, the endurance of now emerging NVM technologies could be traded off at some point in the future, going from SLC to MLC technologies to increase density for instance. Still, even an endurance of 1010 write cycles would remain enough to accommodate most workloads.


Generally speaking, retention decreases as NVM cells degrade. In the case of flash memory, cell degradation occurs as the result of many independent factors, including the number of previous write cycles, the cycling frequency and the cycling temperature. In the case of flash, an uncycled device with a retention time of, say, 10 years across its temperature range, could see its retention drop to only 1 year after 10K cycles.

As was the case for endurance, flash management can help mitigate data retention issues. Indeed, flash management software can (and should) periodically refresh (i.e. copy to a new location) stale data such as to avoid potential data loss. Of course, this technique is of no help if the device remains unpowered for extended periods of time. In that case, cell retention remains crucially important.

In the case of emerging NVMs, retention capabilities obviously fluctuate based on the technology, but also based on various trade-offs with endurance, energy consumption and speed. As such, retention is not only technology dependent but also applications dependent. Everspin’s ST-DDR MRAM series, for instance, is dedicated to SSD acceleration, an important use case for MRAM, where retention is not a cause for concern and could partly be sacrificed in favour of higher access speeds.

In any case, available data suggests that write cycling will be much less of an issue than it is right now for flash memory and that temperature will likely remain the single most important factor at play as far as retention is concerned. For reference Table 3 contains retention specifications gathered from currently available datasheets.

Table 3 - Typical retention numbers for NOR and NAND flash compared to actual RAM-like memory implementations.
NOR (typical)100 years @85°C, uncycled / 1 year @85°C, 10K cycles
NAND SLC (typical)10 years @85°C, uncycled / 1 year @85°C, 10K cycles
Infineon Excelon FRAM10 years @85°C
Fujitsu FRAM (MB85Rx)10 years @105°C
Everspin toggle MRAM (MRx)20 years @105°C
Avalanche STT MRAM (industrial P-SRAM)10 years @105°C
Fujitsu ReRAM (MB85Ax)10 years @85°C

Other Aspects

Other performance aspects such as radiation and magnetic field immunity, soft error rate and read/write disturbance (or lack of), are crucially important for many applications. These are largely technology dependent and there is very little data currently available to support a thorough comparison. In any case, some technologies will likely preserve inherent and very specific technological advantages over other technologies, and find their way into niche applications where extreme requirements leave no other option.


To summarize, PCM, ReRAM, FRAM and MRAM all have compelling advantages over NOR and NAND flash. Among NVM technologies currently in production, MRAM seems to be in the best position to compete with NOR flash. As for NAND, high density technologies (MLC and above) will likely remain unchallenged in high-volume data storage applications for the years to come, but the future of SLC NAND is more uncertain. Overall, density and cost still prevent RAM-like technologies from taking over the world of data storage, but that will not last forever.

If you have any questions or would like some guidance about selecting the best flash device or file system for your application please do not hesitate to contact us.

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